description of
efficiency and
feedback loops and
Hack platform and
hardware simulator and
HDL and
incrementer
maintaining state and
pins and
RAM
ROM
sequential
simulators and
testing and
visualized operations for
Clocks
feedback loops and
memory and
Code generation
commands translation and
data translation and
operating systems and(
see
also Operating systems)
registers and
syntax analysis and
virtual machines and
Combinational logic. See Boolean arithmetic
Commands translation
Common Language Runtime (CLR)
Communications
Compare file
Compilers
abstraction and
analysis-synthesis paradigm and
code generation and
description of
grammars and
Hack and(
see
also Hack)
high-level language and
Jack and(
see
also Jack)
lexical analysis and
mapping and
memory allocation and
nested subroutine calling and
parsing and
p-code and
semantics and
syntax analysis and
VM and(
see
also Virtual Machine)
XML and
Complex Instruction Set Computing (CISC)
Composite gates
Compute instruction (
C
-instruction)
Computers. See also Architecture
ALU and(
see
also Arithmetic Logic Unit)
Boolean abstraction and
bootstrap code and
CPU and(
see
also Central Processing Unit)
dedicated
emulators and
general-purpose
HDL and(
see
also Hardware Description Language)
machine language and
memory and
program flow and
stored program concept and
Conditional execution
Conditional jump
Constants
Control logic
Control unit
Converters. See Not function
Counters
CPU. See Central Processing Unit
Cycles
Data flip-flop (DFF)
clocked chips and
implementation of
sequential logic and
Data races
Debugging
Decoding
Defragmantation
Demultiplexors
Design. See also Architecture
alternative elements for
Boolean logic and
bottom-up
cost and
digital
gate logic and
HDL and(
see
also Hardware Description Language)
modifications and
standards and
testing and
top-down
Device driver
Direct addressing
Division
DOS
Emulators
Hack and
testing and
Equivalence function
Execute cycle
Expression evaluation
Feedback loops
Fetching
File formats
First-fit
Flip-flops
clocked chips and
data
implementation of
memory and
Flow control
Formal languages
Fragmentation
FreeList
Full-adder chip
Functions. See also Boolean logic
And
assembly language symbols and
bootstrap code and
calling commands and
compilers and(
see
also Compilers) Jack and(
see
also Jack)
Nand
Nor
Not
Or
subroutines
symbolic names and
testing and
VM-Hack mapping and
Xor
Gates
adder
And
API specification and
Boolean arithmetic and
Boolean logic and
built-in chips and
buses and
composite
construction of
demultiplexors and
flip-flops and
HDL and(
see
also Hardware Description Language)
interfaces and
memory and
multi-bit versions of
Nand
Nor
Not
Or
primitive
sequential
specification
switching devices and
Xor
Goto operation
Grammars
Jack and
parsing and
syntax analyzer and
Graphical User Interface (GUI)
testing and
visualized chip operations and
Graphics
character output
circle drawing
keyboard handling and
line drawing
multiplication and
pixel drawing
GUI. See Graphical User Interface
Hack
address instruction format and
assembler
built-in chips and
case conventions and
case sensitivity
C
-instruction
CPU and
destination specification and
file formats and
graphics card and
input/output (I/O) handling and
instructions and
Internet and
jump specification
memory and
modifications and
platform description
symbols
syntax
VM mapping and
Half-adder chip
Hardware. See also Input/output architecture of
Boolean logic and
chips and(
see
also Chips; Gates)
keyboard
machine language and
memory and
modifications and
operating systems and
RAM
screen
sequential chips and
simulators and
stored program concept and
Hardware Description Language (HDL)
API notation and
case sensitivity and
chip logic and
compare file
description of
efficiency and
hardware simulator and
header section
identifier naming and
interfaces and
logic building and
parts section
statement representation
technical references for
testing and
visualized chip operations and
Hardware simulator
chip specifications and
Hash tables
HDL. See Hardware Description Language
Heap
High-level language
Jack(
see
also Jack)
operating systems and
program flow and
subroutines and
VM-Hack mapping and
If-goto destination
If-
x
-then-
y
function
Immediate addressing
Incrementer chip
Indirect addressing
Inheritance
Input/output (I/O)
characters and
device driver
graphics
Hack and
keyboards
operating systems and
screens
standards and
Instructions
addresses(
see
also Addresses)
assembler and
CISC
compilers and(
see
also Compilers)
compute
decoding
execution
fetching
labels and
macros and
memory and
RISC
stack processing and(
see
also Stack processing)
subroutines and
symbolic vs. binary
variables and
Interfaces
HDL and
logic gates and
Intermediate language (IL)
Internal pins
Jack
abstract data types and
API notation and
applications writing
array handling
binary code and
classes and
code generation and
constants
constructor for
data types and
evaluation order
expression evaluation and
flow control and
generic statements
grammar and
identifiers
inheritance and
I/O and
Java and
keyboards and
lexical analysis and
linked list implementation
Main.main function
memory and
modifications and
as object-based language
object handling and
operating system
operator priority
parsing and
program elements in
rational numbers and
reserved words
screens and
simplicity of
standard library of
strings and
subroutines and
symbols and
syntax and
tokenizing and
type conversions
variables and
VM code and
void methods and
white space
XML and
Java