The Elements of Computing Systems: Building a Modern Computer from First Principles (19 page)
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Authors: Noam Nisan,Shimon Schocken
BOOK: The Elements of Computing Systems: Building a Modern Computer from First Principles
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Figure 5.2
The Central Processing Unit. Assembled from the ALU and the registers built in chapters 2 and 3, respectively.
The Central Processing Unit. Assembled from the ALU and the registers built in chapters 2 and 3, respectively.
Figure 5.3
Instruction memory.
Instruction memory.
We specify first the built-in chips that interface between the hardware interface and the I/O devices, then the complete memory module that embeds these chips.
Screen
The Hack computer can interact with a black-and-white screen organized as 256 rows of 512 pixels per row. The computer interfaces with the physical screen via a memory map, implemented by a chip called Screen. This chip behaves like regular memory, meaning that it can be read and written to. In addition, it features the side effect that any bit written to it is reflected as a pixel on the physical screen (1 = black, 0 = white). The exact mapping between the memory map and the physical screen coordinates is given in figure 5.4.
The Hack computer can interact with a black-and-white screen organized as 256 rows of 512 pixels per row. The computer interfaces with the physical screen via a memory map, implemented by a chip called Screen. This chip behaves like regular memory, meaning that it can be read and written to. In addition, it features the side effect that any bit written to it is reflected as a pixel on the physical screen (1 = black, 0 = white). The exact mapping between the memory map and the physical screen coordinates is given in figure 5.4.
Keyboard
The Hack computer can interact with a standard keyboard, like that of a personal computer. The computer interfaces with the physical keyboard via a chip called Keyboard (figure 5.5). Whenever a key is pressed on the physical keyboard, its 16-bit ASCII code appears as the output of the Keyboard chip. When no key is pressed, the chip outputs 0. In addition to the usual ASCII codes, the Keyboard chip recognizes, and responds to, the keys listed in figure 5.6.
The Hack computer can interact with a standard keyboard, like that of a personal computer. The computer interfaces with the physical keyboard via a chip called Keyboard (figure 5.5). Whenever a key is pressed on the physical keyboard, its 16-bit ASCII code appears as the output of the Keyboard chip. When no key is pressed, the chip outputs 0. In addition to the usual ASCII codes, the Keyboard chip recognizes, and responds to, the keys listed in figure 5.6.
Figure 5.4
Screen interface.
Screen interface.
Figure 5.5
Keyboard interface.
Keyboard interface.
Figure 5.6
Special keyboard keys in the Hack platform.
Special keyboard keys in the Hack platform.
Now that we’ve described the internal parts of the data memory, we are ready to specify the entire data memory address space.
Overall Memory
The overall address space of the Hack platform (i.e., its entire data memory) is provided by a chip called Memory. The memory chip includes the RAM (for regular data storage) and the screen and keyboard memory maps. These modules reside in a single address space that is partitioned into four sections, as shown in figure 5.7.
5.2.5 ComputerThe overall address space of the Hack platform (i.e., its entire data memory) is provided by a chip called Memory. The memory chip includes the RAM (for regular data storage) and the screen and keyboard memory maps. These modules reside in a single address space that is partitioned into four sections, as shown in figure 5.7.
The topmost chip in the Hack hardware hierarchy is a complete computer system designed to execute programs written in the Hack machine language. This abstraction is described in figure 5.8. The Computer chip contains all the hardware devices necessary to operate the computer including a CPU, a data memory, an instruction memory (ROM), a screen, and a keyboard, all implemented as internal parts. In order to execute a program, the program’s code must be preloaded into the ROM. Control of the screen and the keyboard is achieved via their memory maps, as described in the Screen and Keyboard chip specifications.
5.3 ImplementationThis section gives general guidelines on how the Hack computer platform can be built to deliver the various services described in its specification (section 5.2). As usual, we don’t give exact building instructions, expecting readers to come up with their own designs. All the chips can be built in HDL and simulated on a personal computer using the hardware simulator that comes with the book. As usual, technical details are given in the final Project section of this chapter.
Figure 5.7
Data memory.
Data memory.
Figure 5.8
Computer. Topmost chip of the Hack hardware platform.
Computer. Topmost chip of the Hack hardware platform.
Since most of the action in the Hack platform occurs in its Central Processing Unit, the main implementation challenge is building the CPU. The construction of the rest of the computer platform is straightforward.
5.3.1 The Central Processing UnitThe CPU implementation objective is to create a logic gate architecture capable of executing a given Hack instruction and fetching the next instruction to be executed. Naturally, the CPU will include an ALU capable of executing Hack instructions, a set of registers, and some control logic designed to fetch and decode instructions. Since almost all these hardware elements were already built in previous chapters, the key question here is how to connect them in order to effect the desired CPU operation. One possible solution is illustrated in figure 5.9.
Figure 5.9
Proposed CPU implementation. The diagram shows only
data
and
address paths,
namely, wires that carry data and addresses from one place to another. The diagram does not show the CPU’s
control logic,
except for inputs and outputs of control bits, labeled with a circled “c”. Thus it should be viewed as an incomplete chip diagram.
Proposed CPU implementation. The diagram shows only
data
and
address paths,
namely, wires that carry data and addresses from one place to another. The diagram does not show the CPU’s
control logic,
except for inputs and outputs of control bits, labeled with a circled “c”. Thus it should be viewed as an incomplete chip diagram.
The key element missing in figure 5.9 is the CPU’s
control logic,
designed to perform the following tasks:
control logic,
designed to perform the following tasks:
■
Instruction decoding:
Figure out what the instruction means (a function of the instruction).
Instruction decoding:
Figure out what the instruction means (a function of the instruction).
■
Instruction execution:
Signal the various parts of the computer what they should do in order to execute the instruction (a function of the instruction).
Instruction execution:
Signal the various parts of the computer what they should do in order to execute the instruction (a function of the instruction).
■
Next instruction fetching:
Figure out which instruction to execute next (a function of the instruction and the ALU output).
Next instruction fetching:
Figure out which instruction to execute next (a function of the instruction and the ALU output).
(In what follows, the term
proposed CPU implementation
refers to figure 5.9.)
proposed CPU implementation
refers to figure 5.9.)
Instruction Decoding
The 16-bit word located in the CPU’s instruction input can represent either an
A
-instruction or a
C
-instruction. In order to figure out what this 16-bit word means, it can be broken into the fields “i xx a cccccc ddd jjj”. The i-bit codes the instruction type, which is 0 for an
A
-instruction and 1 for a
C
-instruction. In case of a
C
-instruction, the a-bit and the c-bits code the comp part, the d-bits code the dest part, and the j-bits code the jump part of the instruction. In case of an
A
-instruction, the 15 bits other than the i-bit should be interpreted as a 15-bit constant.
The 16-bit word located in the CPU’s instruction input can represent either an
A
-instruction or a
C
-instruction. In order to figure out what this 16-bit word means, it can be broken into the fields “i xx a cccccc ddd jjj”. The i-bit codes the instruction type, which is 0 for an
A
-instruction and 1 for a
C
-instruction. In case of a
C
-instruction, the a-bit and the c-bits code the comp part, the d-bits code the dest part, and the j-bits code the jump part of the instruction. In case of an
A
-instruction, the 15 bits other than the i-bit should be interpreted as a 15-bit constant.
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